Cygnus Software developed Source Navigator as a commercial product for software engineers. Until about version 4.5 it was sold as a proprietary product. Following the acquisition of Cygnus by Red Hat the product was released under the GPL. Eventually most of the engineers working on Source Navigator left Red Hat and the development stalled in 2001. In 2002, some of the original developers have to moved the project to SourceForge and continue to maintain it in their spare time. The project home page is now at http://sourcenav.sourceforge.net The old site was located at http://sources.redhat.com/sourcenav
OpenSourceEDA appreciated the benefits of Source Navigator for software engineers and realized that hardware and verification engineers needed the same type of tool for Verilog. Unlike the software world, there are relatively few good tools for Verilog available at reasonable prices. The addition of Verilog support to Source Navigator fills this need.
Compressed tar files for both Solaris and Linux are available at http://sourceforge.net/projects/snverilog
Source Navigator for Verilog is NOT available for Microsoft Windows. The EDA market has failed to embrace Windows as a viable platform for hardware development and simulation. Solaris has long been a strong platform for EDA applications, and Linux is also quickly becoming a widely used EDA platform.
Source Navigator for Verilog has been used on HP-UX. Contact us if you have a need for HP-UX. Unfortunately, we don’t have access to this hardware and the number of users is small.
There is not really any source code for Source Navigator for Verilog. The download files for Source Navigator for Verilog can be obtained from http://sourcenav.sourceforge.net contain everything needed for Verilog support. Most of the enhancements for Verilog are in the form of Perl and Tcl/Tk so you can find the source for these in the tar.gz files available for download.
Currently, Source Navigator has plenty of documentation included with the product.
There is no Verilog specific documentation since it is mostly self-explanatory. Just add Verilog files to your project and they will be parsed and added to the project database.
A Verilog parser will read Verilog files and place them into the project database.
The symbol browser allows easy access to locate files, Verilog signals, tasks and functions, and modules in the design.
The editor provides color highlighting for Verilog syntax and makes it easy to locate modules in other files by right-clicking on the module name.
The class browser and hierarchy window provide a good view of the design structure.
The grep window is invaluable when all else fails and you need to find something in your project files.
The Verilog menu on all windows provides easy access to other tools to lint, compile, simulate, and debug your design. All tool links can be customized and settings saved for future sessions.
There are many customizations already available in the “Project Preferences” menu including some customization related to the Verilog parser. Source Navigator for Verilog provides an rc.tcl file that adds many Verilog features. Using an rc.tcl file is described in the Source Navigator documentation. The rc.tcl file can be either global for all users or specific to individual users.
To quickly locate syntax errors and warnings when compiling, Source Navigator for Verilog can be customized to open the source file and go to the correct line number. This feature must be customized by adding a regular expression to the file sn_cmp_g.pat located in <install_dir>/share/etc/sn_cmp_g.pat If you know the format of your errors and warnings it is easy to add entries to this file for your specific tools. If you add regular expressions for common EDA tools please forward them so they can be made available to others.
Yes, an external editor can be customized in the “Product Preferences” menu. There is pretty good support for emacs to open files at the proper line number, but you will definitely loose functionality when using an external editor.